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ila-hw-debug - Debug FPGA behavior with ILA on real hardware

Insert or connect an ILA, rebuild and program an FPGA, configure triggers, capture fresh waveforms, and read them back through JTAG.

Tags

Updated: 2026-10-03

Capabilities

Typical Inputs

Typical Outputs

What this skill does

  • Verify Vivado and hardware connections
  • Mark signals for debug
  • Create and connect ILA cores
  • Rebuild debug-enabled bitstreams
  • Program FPGA devices
  • Configure ILA trigger conditions
  • Arm and capture waveforms
  • Read captured waveform data
  • Verify DRC and timing

Inputs

  • Vivado project
  • Target signals
  • Trigger conditions
  • FPGA board
  • JTAG connection
  • Debug bitstream
  • Matching LTX probes file

Outputs

  • Connection status
  • Debug-enabled bitstream
  • LTX probes file
  • Programmed FPGA device
  • Captured waveform data
  • Hardware debug status

Requirements

  • SynthPilot MCP server
  • Vivado with open project
  • Running Tcl server
  • Physical JTAG-connected board
  • Running hw_server
  • Vivado hardware-manager access

Source

  • Spec: SKILL.md

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FPGA
ILA
hardware debug
Vivado
JTAG
waveform capture
Verify Vivado and hardware connections
Mark signals for debug
Create and connect ILA cores
Rebuild debug-enabled bitstreams
Vivado project
Target signals
Trigger conditions
Connection status
Debug-enabled bitstream
LTX probes file